The Teensy 4.0 (with Headers) is a compact, high-performance development board from PJRC built around a 600 MHz ARM Cortex-M7 processor. It comes with pre-soldered male headers, so it plugs straight into a breadboard for solder-free prototyping.
It shares the same size and shape as the Teensy 3.2, making it an easy drop-in upgrade for existing projects. At its heart is the NXP i.MX RT1062 (MIMXRT1062DVL6B), a dual-issue superscalar core with branch prediction and a hardware FPU that accelerates both 32-bit float and 64-bit double maths. Of its 1 MB RAM, 512 KB is tightly coupled memory for single-cycle access, alongside 2 MB of flash.
The board supports dynamic clock scaling without disturbing serial baud rates, audio sample rates or delay()/millis() timing. A dedicated on/off pin lets you cut 3.3V power, and a coin cell on VBAT keeps the real-time clock running when main power is off. Typical current draw is around 100 mA at 600 MHz.
Features
- ARM Cortex-M7 at 600 MHz
- 1024 KB RAM (512 KB tightly coupled)
- 2048 KB flash (64 KB reserved for recovery & EEPROM emulation)
- 2 USB ports, both 480 Mbit/s
- 3 CAN bus (1 with CAN FD)
- 2 I2S digital audio ports
- 1 S/PDIF digital audio port
- 1 native 4-bit SDIO port for SD cards
- 3 SPI ports, all with 16-word FIFO
- 3 I2C ports, all with 4-byte FIFO
- 7 serial ports, all with 4-byte FIFO
- 32 general-purpose DMA channels
- 31 PWM pins
- 40 digital pins, all interrupt capable
- 14 analog pins, 2 ADCs on chip
- Cryptographic acceleration
- Random number generator
- Real-time clock for date/time
- Programmable FlexIO
- Pixel processing pipeline
- Peripheral cross triggering
- On/off power management
- Pre-soldered male headers
Dimensions
36 mm x 18 mm (1.4" x 0.7")
What's in the box?
1 x Teensy 4.0 (Headers)